A pattern-matching scheme with high throughput performance and low memory requirement

  • Authors:
  • Tsern-Huei Lee;Nai-Lun Huang

  • Affiliations:
  • Institute of Communication Engineering, National Chiao Tung University, Hsinchu, Taiwan;Institute of Communication Engineering, National Chiao Tung University, Hsinchu, Taiwan

  • Venue:
  • IEEE/ACM Transactions on Networking (TON)
  • Year:
  • 2013

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Abstract

Pattern-matching techniques have recently been applied to network security applications such as intrusion detection, virus protection, and spam filters. The widely used Aho-Corasick (AC) algorithm can simultaneously match multiple patterns while providing a worst-case performance guarantee. However, as transmission technologies improve, the AC algorithm cannot keep up with transmission speeds in high-speed networks. Moreover, it may require a huge amount of space to store a two-dimensional state transition table when the total length of patterns is large. In this paper, we present a pattern-matching architecture consisting of a stateful pre-filter and an AC-based verification engine. The stateful pre-filter is optimal in the sense that it is equivalent to utilizing all previous query results. In addition, the filter can be easily realized with bitmaps and simple bitwise-AND and shift operations. The size of the two-dimensional state transition table in our proposed architecture is proportional to the number of patterns, as opposed to the total length of patterns in previous designs. Our proposed architecture achieves a significant improvement in both throughput performance and memory usage.