Detecting coarse-grain parallelism using an interprocedural parallelizing compiler

  • Authors:

  • Mary H. Hall;Saman P. Amarasinghe;Brian R. Murphy;Shih-Wei Liao;Monica S. Lam

  • Affiliations:

  • Computer Systems Laboratory, Stanford University, Stanford, CA and Computer Science Dept., California Institute of Technology, Pasadena, CA;Computer Systems Laboratory, Stanford University, Stanford, CA and Computer Science Dept., California Institute of Technology, Pasadena, CA;Computer Systems Laboratory, Stanford University, Stanford, CA and Computer Science Dept., California Institute of Technology, Pasadena, CA;Computer Systems Laboratory, Stanford University, Stanford, CA and Computer Science Dept., California Institute of Technology, Pasadena, CA;Computer Systems Laboratory, Stanford University, Stanford, CA and Computer Science Dept., California Institute of Technology, Pasadena, CA

  • Venue:
  • Supercomputing '95 Proceedings of the 1995 ACM/IEEE conference on Supercomputing
  • Year:
  • 1995

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Abstract

This paper presents an extensive empirical evaluation of an interprocedural parallelizing compiler, developed as part of the Stanford SUIF compiler system. The system incorporates a comprehensive and integrated collection of analyses, including privatization and reduction recognition for both array and scalar variables, and symbolic analysis of array subscripts. The interprocedural analysis framework is designed to provide analysis results nearly as precise as full inlining but without its associated costs. Experimentation with this system shows that it is capable of detecting coarser granularity of parallelism than previously possible. Specifically, it can parallelize loops that span numerous procedures and hundreds of lines of codes, frequently requiring modifications to array data structures such as privatization and reduction transformations. Measurements from several standard benchmark suites demonstrate that an integrated combination of interprocedural analyses can substantially advance the capability of automatic parallelization technology.