CMOS wireless transceiver design
CMOS wireless transceiver design
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Low power and high gain current reuse LNA with modified input matching and inter-stage inductors
Microelectronics Journal
IEEE Transactions on Circuits and Systems Part I: Regular Papers
The blocker challenge when implementing software defined radio receiver RF frontends
Analog Integrated Circuits and Signal Processing
A technique for improving gain and noise figure of common-gate wideband LNAs
Analog Integrated Circuits and Signal Processing
Power consumption of analog circuits: a tutorial
Analog Integrated Circuits and Signal Processing
Parallel-RC feedback low-noise amplifier for UWB applications
IEEE Transactions on Circuits and Systems II: Express Briefs
Design of a low voltage-low power 3.1-10.6 GHz UWB RF front-end in a CMOS 65 nm technology
IEEE Transactions on Circuits and Systems II: Express Briefs
A new CMOS wideband low noise amplifier with gain control
Integration, the VLSI Journal
VLSID '11 Proceedings of the 2011 24th International Conference on VLSI Design
A 1.1 V 6.2 mW, wideband RF front-end for 0 dBm blocker tolerant receivers in 90 nm CMOS
Analog Integrated Circuits and Signal Processing
Classical and modern receiver architectures
IEEE Communications Magazine
The software radio architecture
IEEE Communications Magazine
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The realization of Software Defined Radio (SDR) requires flexible RF front-end to accommodate multiple standards in different frequency bands. In this review paper, we survey the literature over the period 1995-2011 and discuss the state-of-the-art multiband and wideband LNAs in context of different receiver architectures suitable for SDR. Wideband and multiband LNA designs reported in open literature are categorized on the basis of their circuit architecture. Measured results of the sample LNA designs from each category are tabulated and discussed with emphasis on power consumption, NF, gain, linearity, and impedance matching tradeoffs. We have also discussed our own three wideband inductorless LNA design prototypes which are manufactured in 0.13@?m and 90nm CMOS. This review infers that future LNAs suitable for SDR must be highly linear and scalable with future technology nodes.