Low power and high gain current reuse LNA with modified input matching and inter-stage inductors

Authors:
S. Toofan;A. R. Rahmati;A. Abrishamifar;G. Roientan Lahiji
Affiliations:
Electrical Engineering Department, Iran University of Science and Technology, Narmak, Tehran, Iran;Electrical Engineering Department, Iran University of Science and Technology, Narmak, Tehran, Iran;Electrical Engineering Department, Iran University of Science and Technology, Narmak, Tehran, Iran;Electrical Engineering Department, Iran University of Science and Technology, Narmak, Tehran, Iran
Venue:
Microelectronics Journal
Year:
2008

Citing 3
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Abstract

In this paper we present a fully integrated current reuse CMOS LNA (low noise amplifier) with modified input matching circuitry and inductive inter-stage architecture in 0.18@mm CMOS technology. To reduce the large spiral inductors that actually require larger surface area for their fabrication, two parallel LC circuits are used with two small spiral on-chip inductors. Using cascode configuration equipped by parallel inter-stage LCs, we achieved lower power consumption with higher power gain. In this configuration we used two cascoded transistors to have a good output swing suitable for low voltage technology compared to other current reuse configurations. This configuration provides better input matching, lower noise figure and more reverse isolation which is vital in LNA design. Complete analytical simulation of the circuit results in center frequency of 5.5GHz, with 1.9dB NF, 50@W input impedance, 1GHz 3dB power bandwidth, 20.5dB power gain (S"2"1), high reverse isolation (S"1"2)