RF microelectronics
A Tuned Wideband LNA in 0.25µm IBM Process For RF Communication Applications
VLSID '04 Proceedings of the 17th International Conference on VLSI Design
Design of a 1.8 GHz low-noise amplifier for RF front-end in a 0.8 μm CMOS technology
IEEE Transactions on Consumer Electronics
Low power and high gain current reuse LNA with modified input matching and inter-stage inductors
Microelectronics Journal
A High linearity CMOS low noise amplifier for 3.66GHz applications using current-reused topology
Microelectronics Journal
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In this paper, we present the design of a fully integrated CMOS low noise amplifier (LNA) with on-chip spiral inductors in 0.18@mm CMOS technology for 2.4GHz frequency range. Using cascode configuration, lower power consumption with higher voltage and power gain are achieved. In this configuration, we managed to have a good trade off among low noise, high gain, and stability. Using common-gate (CG) configuration, we reduced the parasitic effects of C"g"d and therefore alleviated the stability and linearity of the amplifier. This configuration provides more reverse isolation that is also important in LNA design. The LNA presented here offers a good noise performance. Complete simulation analysis of the circuit results in center frequency of 2.4GHz, with 37.6dB voltage gain, 2.3dB noise figure (NF), 50@W input impedance, 450MHz 3dB power bandwidth, 11.2dB power gain (S"2"1), high reverse isolation (S"1"2)