DFS: a file system for virtualized flash storage
FAST'10 Proceedings of the 8th USENIX conference on File and storage technologies
Write endurance in flash drives: measurements and analysis
FAST'10 Proceedings of the 8th USENIX conference on File and storage technologies
Removing the costs of indirection in flash-based SSDs with nameless writes
HotStorage'10 Proceedings of the 2nd USENIX conference on Hot topics in storage and file systems
De-indirection for flash-based SSDs with nameless writes
FAST'12 Proceedings of the 10th USENIX conference on File and Storage Technologies
Physically addressed queueing (PAQ): improving parallelism in solid state disks
Proceedings of the 39th Annual International Symposium on Computer Architecture
An evaluation of different page allocation strategies on high-speed SSDs
HotStorage'12 Proceedings of the 4th USENIX conference on Hot Topics in Storage and File Systems
Middleware - firmware cooperation for high-speed solid state drives
Proceedings of the Posters and Demo Track
Revisiting widely held SSD expectations and rethinking system-level implications
Proceedings of the ACM SIGMETRICS/international conference on Measurement and modeling of computer systems
Exploring the future of out-of-core computing with compute-local non-volatile memory
SC '13 Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis
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The PCI Express Solid State Disks (PCIe SSDs) blur the difference between block and memory access semantic devices. Since these SSDs leverage PCIe bus as storage interface, their interfaces are different from conventional memory system interconnects as well as thin storage interfaces. This leads to a new SSD architecture and storage software stack design. Unfortunately, there are not many studies focusing on the system characteristics of these emerging PCIe SSD platforms. In this paper, we quantitatively analyze the challenges faced by PCIe SSDs in getting flash memory closer to CPU and study two representative PCIe SSD architectures (from-scratch SSD and bridge-based SSD) using state-of-the-art real SSDs from two different vendors. Our experimental analysis reveals that 1) while the from-scratch SSD approach offers remarkable performance improvements, it requires enormous host-side memory and computation resources which may not be acceptable in many computing systems; 2) the performance of the from-scratch SSD significantly degrades in a multi-core system; 3) redundant flash software and controllers should be eliminated from the bridge-based SSD architecture; and 4) latency of PCIe SSDs significantly degrade with their storage-level queueing mechanism. Finally, we discuss system implications including potential PCIe SSD applications such as all-flash array.