The Designer's Guide to VHDL
A correlation-based design space exploration methodology for multi-processor systems-on-chip
Proceedings of the 47th Design Automation Conference
An integrated framework for joint design space exploration of microarchitecture and circuits
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Refinement of UML/MARTE models for the design of networked embedded systems
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
UML-Based Modeling and Simulation of Environmental Effects in Networked Embedded Systems
DSD '13 Proceedings of the 2013 Euromicro Conference on Digital System Design
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The design of the network in distributed embedded systems often necessitates the analysis of its HW/SW tradeoffs along with network tradeoffs. To do so, a framework is presented to perform joint exploration of both HW/SW and network (NW) design spaces. In the proposed approach, UML+Profiles are used to model the whole system and SystemC code generation mechanism is exploited to validate it. SystemC-based HW/SW and NW simulators are integrated and used to simulate the overall system model. Design tradeoffs of HW/SW and NW are characterized to define the overall joint design space. In order to validate the proposed framework, an example of automotive application is used to explore several performance metrics and show how the framework is able to find the optimal set of design parameters.