The SPLASH-2 programs: characterization and methodological considerations
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Efficient Global Optimization of Expensive Black-Box Functions
Journal of Global Optimization
A Statistically Rigorous Approach for Improving Simulation Methodology
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
Accurate and efficient regression modeling for microarchitectural performance and power prediction
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Efficient design space exploration for application specific systems-on-a-chip
Journal of Systems Architecture: the EUROMICRO Journal
Interactive presentation: Soft-core processor customization using the design of experiments paradigm
Proceedings of the conference on Design, automation and test in Europe
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A fast and elitist multiobjective genetic algorithm: NSGA-II
IEEE Transactions on Evolutionary Computation
A framework for evolutionary optimization with approximate fitnessfunctions
IEEE Transactions on Evolutionary Computation
IEEE Transactions on Evolutionary Computation
Single- and multiobjective evolutionary optimization assisted by Gaussian random field metamodels
IEEE Transactions on Evolutionary Computation
Boosting design space explorations with existing or automatically learned knowledge
MMB'12/DFT'12 Proceedings of the 16th international GI/ITG conference on Measurement, Modelling, and Evaluation of Computing Systems and Dependability and Fault Tolerance
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Accurate on-chip router area modeling with kriging methodology
Proceedings of the International Conference on Computer-Aided Design
XDRA: exploration and optimization of last-level cache for energy reduction in DDR DRAMs
Proceedings of the 50th Annual Design Automation Conference
Compositional system-level design exploration with planning of high-level synthesis
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Design space pruning through hybrid analysis in system-level design space exploration
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Exploiting domain knowledge in system-level MPSoC design space exploration
Journal of Systems Architecture: the EUROMICRO Journal
Design-space exploration and runtime resource management for multicores
ACM Transactions on Embedded Computing Systems (TECS) - Special issue on application-specific processors
Wimpy or brawny cores: A throughput perspective
Journal of Parallel and Distributed Computing
A framework for design space exploration and performance analysis of networked embedded systems
Proceedings of the 6th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools
A comparative evaluation of multi-objective exploration algorithms for high-level design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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Given the increasing complexity of multi-processor systems-on-chip, a wide range of parameters must be tuned to find the best trade-offs in terms of the selected system figures of merit (such as energy, delay and area). This optimization phase is called Design Space Exploration (DSE) consisting of a Multi-Objective Optimization (MOO) problem. In this paper, we propose an iterative design space exploration methodology exploiting the statistical properties of known system configurations to infer, by means of a correlation-based analysis, the next design points to be analyzed with low-level simulations. In fact, the knowledge of few design points is used to predict the expected improvement of unknown configurations. We show that the correlation of the configurations within the multi-processor design space can be modeled successfully with analytical functions and, thus, speed up the overall exploration phase. This makes the proposed methodology a model-assisted heuristic that, for the first time, exploits the correlation about architectural configurations to converge to the solution of the multi-objective problem.