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SMARTS: accelerating microarchitecture simulation via rigorous statistical sampling
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A First-Order Superscalar Processor Model
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Improving Computer Architecture Simulation Methodology by Adding Statistical Rigor
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Efficiently exploring architectural design spaces via predictive modeling
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Efficiently exploring architectural design spaces via predictive modeling
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Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Automatic cache tuning for energy-efficiency using local regression modeling
Proceedings of the 44th annual Design Automation Conference
Efficient architectural design space exploration via predictive modeling
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Efficiency trends and limits from comprehensive microarchitectural adaptivity
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Efficient system design space exploration using machine learning techniques
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A dollar from 15 cents: cross-platform management for internet services
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Exploring and predicting the architecture/optimising compiler co-design space
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Prediction models for multi-dimensional power-performance optimization on many cores
Proceedings of the 17th international conference on Parallel architectures and compilation techniques
Proceedings of the 2009 SPEC Benchmark Workshop on Computer Performance Evaluation and Benchmarking
Variability-aware robust design space exploration of chip multiprocessor architectures
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Toward a multicore architecture for real-time ray-tracing
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
CPR: Composable performance regression for scalable multiprocessor models
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
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Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Empirical Performance Models for Java Workloads
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A mechanistic performance model for superscalar out-of-order processors
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Defining relevant distances between server workloads
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Accurate and efficient processor performance prediction via regression tree based modeling
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Machine learning-based prefetch optimization for data center applications
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ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
Rapid early-stage microarchitecture design using predictive models
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Empirical performance models for 3T1D memories
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Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
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Dynamic microarchitectural adaptation using machine learning
ACM Transactions on Architecture and Code Optimization (TACO)
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ACM Transactions on Computer Systems (TOCS)
REF: resource elasticity fairness with sharing incentives for multiprocessors
Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
Power-performance modeling on asymmetric multi-cores
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ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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We propose regression modeling as an efficient approach for accurately predicting performance and power for various applications executing on any microprocessor configuration in a large microarchitectural design space. This paper addresses fundamental challenges in microarchitectural simulation cost by reducing the number of required simulations and using simulated results more effectively via statistical modeling and inference.Specifically, we derive and validate regression models for performance and power. Such models enable computationally efficient statistical inference, requiring the simulation of only 1 in 5 million points of a joint microarchitecture-application design space while achieving median error rates as low as 4.1 percent for performance and 4.3 percent for power. Although both models achieve similar accuracy, the sources of accuracy are strikingly different. We present optimizations for a baseline regression model to obtain (1) application-specific models to maximize accuracy in performance prediction and (2) regional power models leveraging only the most relevant samples from the microarchitectural design space to maximize accuracy in power prediction. Assessing sensitivity to the number of samples simulated for model formulation, we find fewer than 4,000 samples from a design space of approximately 22 billion points are sufficient. Collectively, our results suggest significant potential in accurate and efficient statistical inference for microarchitectural design space exploration via regression models.