Understanding some simple processor-performance limits
IBM Journal of Research and Development - Special issue: performance analysis and its impact on design
3.3 Performance Test Case Generation for Microprocessors
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor
PACS '00 Proceedings of the First International Workshop on Power-Aware Computer Systems-Revised Papers
Optimizing pipelines for power and performance
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
MisSPECulation: partial and misleading use of SPEC CPU2000 in computer architecture conferences
Proceedings of the 30th annual international symposium on Computer architecture
Microarchitectural techniques for power gating of execution units
Proceedings of the 2004 international symposium on Low power electronics and design
Understanding the energy efficiency of simultaneous multithreading
Proceedings of the 2004 international symposium on Low power electronics and design
Balancing hardware intensity in microprocessor pipelines
IBM Journal of Research and Development
IBM Journal of Research and Development
Power-performance simulation: design and validation strategies
ACM SIGMETRICS Performance Evaluation Review - Special issue on tools for computer architecture research
Exploiting Structural Duplication for Lifetime Reliability Enhancement
Proceedings of the 32nd annual international symposium on Computer Architecture
Power and thermal effects of SRAM vs. Latch-Mux design styles and clock gating choices
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
The need for a full-chip and package thermal model for thermally optimized IC designs
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
Improved automatic testcase synthesis for performance model validation
Proceedings of the 19th annual international conference on Supercomputing
Techniques for Multicore Thermal Management: Classification and New Exploration
Proceedings of the 33rd annual international symposium on Computer Architecture
Power efficiency for variation-tolerant multicore processors
Proceedings of the 2006 international symposium on Low power electronics and design
Accurate and efficient regression modeling for microarchitectural performance and power prediction
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
A dynamic binary instrumentation engine for the ARM architecture
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Impact of process variations on multicore performance symmetry
Proceedings of the conference on Design, automation and test in Europe
Effective support of simulation in computer architecture instruction
WCAE '02 Proceedings of the 2002 workshop on Computer architecture education: Held in conjunction with the 29th International Symposium on Computer Architecture
Performance modeling for early analysis of multi-core systems
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Efficiency trends and limits from comprehensive microarchitectural adaptivity
Proceedings of the 13th international conference on Architectural support for programming languages and operating systems
FaCSim: a fast and cycle-accurate architecture simulator for embedded systems
Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems
Calibration of abstract performance models for system-level design space exploration
Journal of Signal Processing Systems - Special Issue: Embedded computing systems for DSP
Online Estimation of Architectural Vulnerability Factor for Soft Errors
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Instruction-driven clock scheduling with glitch mitigation
Proceedings of the 13th international symposium on Low power electronics and design
A performance methodology for commercial servers
IBM Journal of Research and Development
Thermal analysis of multiprocessor SoC applications by simulation and verification
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Multicore power management: ensuring robustness via early-stage formal verification
MEMOCODE'09 Proceedings of the 7th IEEE/ACM international conference on Formal Methods and Models for Codesign
Applied inference: Case studies in microarchitectural design
ACM Transactions on Architecture and Code Optimization (TACO)
Power and performance aware reconfigurable cache for CMPs
Proceedings of the Second International Forum on Next-Generation Multicore/Manycore Technologies
Hotspot: acompact thermal modeling methodology for early-stage VLSI design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
PACS'03 Proceedings of the Third international conference on Power - Aware Computer Systems
Power Modeling and Characterization of Computing Devices: A Survey
Foundations and Trends in Electronic Design Automation
Performance analysis of multi-threaded multi-core CPUs
Proceedings of the First International Workshop on Many-core Embedded Systems
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In this article, we describe a workload-driven simulation environment for PowerPC processor microarchitecture performance exploration. This environment is characterized by its flexibility and generality, a faster simulation speed than other similar environments, a realistic representation of microarchitecture features, and confidence in its predictions arising from a systematic performance validation process. We summarize the salient properties of the environment, and give brief examples of its usage and results. Further information about the environment and explorations performed with it are reported elsewhere.