Power-performance modeling on asymmetric multi-cores

  • Authors:

  • Mihai Pricopi;Thannirmalai Somu Muthukaruppan;Vanchinathan Venkataramani;Tulika Mitra;Sanjay Vishin

  • Affiliations:

  • National University of Singapore;National University of Singapore;National University of Singapore;National University of Singapore;Cambridge Silicon Radio

  • Venue:
  • Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
  • Year:
  • 2013

Quantified Score

Hi-index 0.00

Visualization

Abstract

Asymmetric multi-core architectures have recently emerged as a promising alternative in a power and thermal constrained environment. They typically integrate cores with different power and performance characteristics, which makes mapping of workloads to appropriate cores a challenging task. Limited number of performance counters and heterogeneous memory hierarchy increase the difficulty in predicting the performance and power consumption across cores in commercial asymmetric multi-core architectures. In this work, we propose a software-based modeling technique that can estimate performance and power consumption of workloads for different core types. We evaluate the accuracy of our technique on ARM big.LITTLE asymmetric multi-core platform.