Cost-performance analysis of heterogeneity in supercomputer architectures
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An analytical approach to performance/cost modeling of parallel computers
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The robustness of NUMA memory management
SOSP '91 Proceedings of the thirteenth ACM symposium on Operating systems principles
Scheduling and page migration for multiprocessor compute servers
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
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ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
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IEEE Transactions on Parallel and Distributed Systems
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Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Scheduling Strategies for Master-Slave Tasking on Heterogeneous Processor Platforms
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Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance
Proceedings of the 31st annual international symposium on Computer architecture
Heat-and-run: leveraging SMT and CMP to manage power density through the operating system
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Scheduling for heterogeneous processors in server systems
Proceedings of the 2nd conference on Computing frontiers
Mitigating Amdahl's Law through EPI Throttling
Proceedings of the 32nd annual international symposium on Computer Architecture
The Impact of Performance Asymmetry in Emerging Multicore Architectures
Proceedings of the 32nd annual international symposium on Computer Architecture
Heterogeneous Chip Multiprocessors
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Proceedings of the 33rd annual international symposium on Computer Architecture
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ATEC '05 Proceedings of the annual conference on USENIX Annual Technical Conference
SWAP: a scheduler with automatic process dependency detection
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Exploiting unbalanced thread scheduling for energy and performance on a CMP of SMT processors
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
PipesFS: fast Linux I/O in the unix tradition
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Proceedings of the 14th ACM SIGPLAN symposium on Principles and practice of parallel programming
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Bias scheduling in heterogeneous multi-core architectures
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Event-driven processor power management
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Recent research advocates asymmetric multi-core architectures, where cores in the same processor can have different performance. These architectures support single-threaded performance and multithreaded throughput at lower costs (e.g., die size and power). However, they also pose unique challenges to operating systems, which traditionally assume homogeneous hardware. This paper presents AMPS, an operating system scheduler that efficiently supports both SMP-and NUMA-style performance-asymmetric architectures. AMPS contains three components: asymmetry-aware load balancing, faster-core-first scheduling, and NUMA-aware migration. We have implemented AMPS in Linux kernel 2.6.16 and used CPU clock modulation to emulate performance asymmetry on an SMP and NUMA system. For various workloads, we show that AMPS achieves a median speedup of 1.16 with a maximum of 1.44 over stock Linux on the SMP, and a median of 1.07 with a maximum of 2.61 on the NUMA system. Our results also show that AMPS improves fairness and repeatability of application performance measurements.