Response surface methodology: 1966–1988
Technometrics
The SPLASH-2 programs: characterization and methodological considerations
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Life at the end of CMOS scaling (and beyond) (panel session) (abstract only)
Proceedings of the 37th Annual Design Automation Conference
Parameter variations and impact on circuits and microarchitecture
Proceedings of the 40th annual Design Automation Conference
Variability and energy awareness: a microarchitecture-level perspective
Proceedings of the 42nd annual Design Automation Conference
Proceedings of the 42nd annual Design Automation Conference
Accurate and efficient regression modeling for microarchitectural performance and power prediction
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Maintaining the benefits of CMOS scaling when scaling bogs down
IBM Journal of Research and Development
ACM Transactions on Embedded Computing Systems (TECS)
Static statistical MPSoC power optimization by variation-aware task and communication scheduling
Microprocessors & Microsystems
| Hi-index | 0.00 |
In the context of a design space exploration framework for supporting the platform-based design approach, we address the problem of robustness with respect to manufacturing process variations. First, we introduce response surface modeling techniques to enable an efficient evaluation of the statistical measures of execution time and energy consumption for each system configuration. We then introduce a robust design space exploration framework to afford the problem of the impact of manufacturing process variations onto the system-level metrics and consequently onto the application-level constraints. We finally provide a comparison of our design space exploration technique with conventional approaches.1