Power analysis of embedded software: a first step towards software power minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Machine Learning
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Machine Learning
Accurate and efficient regression modeling for microarchitectural performance and power prediction
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Application-specific customization of parameterized FPGA soft-core processors
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Efficient architectural design space exploration via predictive modeling
ACM Transactions on Architecture and Code Optimization (TACO)
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Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture
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Proceedings of the 37th annual international symposium on Computer architecture
Exploration and Customization of FPGA-Based Soft Processors
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fast Design Space Exploration Using Local Regression Modeling With Application to ASIPs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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This paper presents a design space exploration framework for an FPGA-based soft processor that is built on the estimation of power and performance metrics using algorithm and architecture parameters. The proposed framework is based on regression trees, a popular machine learning technique, that can capture the relationship of low-level soft-processor parameters and high-level algorithm parameters of a specific application domain, such as image compression. In doing this, power and execution time of an algorithm can be predicted before implementation and on unseen configurations of soft processors. For system designers this can result in fast design space exploration at an early stage in design.