A Block Processing Unit in a Single-Chip MPEG-2 Video Encoder LSI
Journal of VLSI Signal Processing Systems - Special issue on the 1997 IEEE workshop on signal processing systems (SiPS): design and implementation
System architecture directions for networked sensors
ACM SIGPLAN Notices
An MPEG-2 Encoder Architecture Based on a Single-Chip Dedicated LSI with a Control MPU
ICASSP '97 Proceedings of the 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP '97) -Volume 1 - Volume 1
Simulating the power consumption of large-scale sensor network applications
SenSys '04 Proceedings of the 2nd international conference on Embedded networked sensor systems
An Image Sensor Node for Wireless Sensor Networks
ITCC '05 Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'05) - Volume II - Volume 02
Energy aware lossless data compression
Proceedings of the 1st international conference on Mobile systems, applications and services
Protocols and Architectures for Wireless Sensor Networks
Protocols and Architectures for Wireless Sensor Networks
CMOS image sensors for sensor networks
Analog Integrated Circuits and Signal Processing
A survey on wireless multimedia sensor networks
Computer Networks: The International Journal of Computer and Telecommunications Networking
Energy-optimized image communication on resource-constrained sensor platforms
Proceedings of the 6th international conference on Information processing in sensor networks
Low-complexity and energy efficient image compression scheme for wireless sensor networks
Computer Networks: The International Journal of Computer and Telecommunications Networking
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Low power hardware-based image compression solution for wireless camera sensor networks
Computer Standards & Interfaces
Practical data compression in wireless sensor networks: A survey
Journal of Network and Computer Applications
Embedded image coding using zerotrees of wavelet coefficients
IEEE Transactions on Signal Processing
IEEE Transactions on Circuits and Systems for Video Technology
VLSI architecture design of MPEG-4 shape coding
IEEE Transactions on Circuits and Systems for Video Technology
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Demand for low-power sensing devices with integrated image processing capabilities is increasing, especially for resource-constrained systems such as WSNs. CMOS technology enables the integration of image sensing and image processing, which improves the overall system performance. The aim of this paper is to present and evaluate a smart image sensor integrating a user-driven video compression scheme designed to respect the energy constraints of image processing and transmission over WSNs. The interest of our solution is twofold. First, compression settings can be changed at run time depending on video characteristics. Second, compression is applied only on blocks that change significantly over time. This paper presents in details the internal hardware architecture of the proposed system and describes its performance, with relevant comparisons to some related works.