FPGA simulation engine for customized construction of neural microcircuits

Authors:
Hugh T. Blair;Jason Cong;Di Wu
Affiliations:
University of California, Los Angeles, California;University of California, Los Angeles, California;University of California, Los Angeles, California
Venue:
Proceedings of the International Conference on Computer-Aided Design
Year:
2013

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Abstract

In this paper we describe an FPGA-based platform for high-performance and low-power simulation of neural microcircuits composed from integrate-and-fire (IAF) neurons. Based on high-level synthesis, our platform uses design templates to map hierarchies of neuron model to logic fabrics. This approach bypasses high design complexity and enables easy optimization and design space exploration. We demonstrate the benefits of our platform by simulating a variety of neural microcircuits that perform oscillatory path integration, which evidence suggests may be a critical building block of the navigation system inside a rodent's brain. Experiments show that our FPGA simulation engine for oscillatory neural microcircuits can achieve up to 39x speedup compared to software benchmarks on commodity CPU, and 232x energy reduction compared to embedded ARM core.