Compilation and verification of LOTOS specifications
Proceedings of the IFIP WG6.1 Tenth International Symposium on Protocol Specification, Testing and Verification X
International Journal on Software Tools for Technology Transfer (STTT) - Special section on high-level test of complex systems
State space reduction for process algebra specifications
Theoretical Computer Science - Algebraic methodology and software technology
A Model Checking Language for Concurrent Value-Passing Systems
FM '08 Proceedings of the 15th international symposium on Formal Methods
Verification of GALS Systems by Combining Synchronous Languages and Process Calculi
Proceedings of the 16th International SPIN Workshop on Model Checking Software
Model checking and co-simulation of a dynamic task dispatcher circuit using CADP
FMICS'11 Proceedings of the 16th international conference on Formal methods for industrial critical systems
JTorX: a tool for on-line model-driven test derivation and execution
TACAS'10 Proceedings of the 16th international conference on Tools and Algorithms for the Construction and Analysis of Systems
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The complexity of multiprocessor architectures for mobile multimedia applications renders their validation challenging. In addition, to provide the necessary flexibility, a part of the functionality is realized by software. Thus, a formal model has to take into account both hardware and software. In this article we report on the use of the CADP toolbox for the formal modeling and analysis of the DTD (Dynamic Task Dispatcher), a complex hardware block of an industrial hardware architecture developed by STMicroelectronics. The formal LNT model developed by an industry engineer was appropriate to discuss implementation details with the architect and enabled model-checking temporal properties expressed in MCL, which discovered a possible problem. We investigated the existence of the problem in the architect's C++ model using co-simulation of the C++ and the formal LNT models.