Writing scalable SIMD programs with ISPC

  • Authors:
  • James Brodman;Dmitry Babokin;Ilia Filippov;Peng Tu

  • Affiliations:
  • Intel Corporation, Santa Clara, CA, USA;Intel Corporation, Moscow, Russian Fed.;Intel Corporation, Moscow, Russian Fed.;Intel Corporation, Santa Clara, CA, USA

  • Venue:
  • Proceedings of the 2014 Workshop on Programming models for SIMD/Vector processing
  • Year:
  • 2014

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Abstract

Modern processors contain many resources for parallel execution. In addition to having multiple cores, processors can also contain vector functional units that are capable of performing a single operation on multiple inputs in parallel. Taking advantage of this vector hardware is essential to obtaining peak performance on a machine, but it is often challenging for programmers to do so. This paper presents a performance study of compiling several benchmarks from the domains of computer graphics, financial modeling, and high-performance computing for different vector instruction sets using the Intel SPMD Program Compiler, an alternative to compiler autovectorization of scalar code or handwriting vector code with intrinsics. ispc is both a language and compiler that produces high quality code for SIMD CPU vector extensions such as Intel Streaming SIMD Extensions (SSE), Intel Advanced Vector Extensions (AVX), or ARM NEON. We present the results of compiling the same ispc source program for various targets. The performance of the resulting ispc versions is compared to that of scalar C++ code, and we also examine the scalability of the benchmarks when targeting wider vector units.