Evaluation of architectural support for global address-based communication in large-scale parallel machines

  • Authors:

  • Arvind Krishnamurthy;Klaus E. Schauser;Chris J. Scheiman;Randolph Y. Wang;David E. Culler;Katherine Yelick

  • Affiliations:

  • Computer Science Division, University of California, Berkeley, CA;Department of Computer Science, University of California, Santa Barbara, CA;Department of Computer Science, University of California, Santa Barbara, CA;Computer Science Division, University of California, Berkeley, CA;Computer Science Division, University of California, Berkeley, CA;Computer Science Division, University of California, Berkeley, CA

  • Venue:
  • Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
  • Year:
  • 1996

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Abstract

Large-scale parallel machines are incorporating increasingly sophisticated architectural support for user-level messaging and global memory access. We provide a systematic evaluation of a broad spectrum of current design alternatives based on our implementations of a global address language on the Thinking Machines CM-5, Intel Paragon, Meiko CS-2, Cray T3D, and Berkeley NOW. This evaluation includes a range of compilation strategies that make varying use of the network processor; each is optimized for the target architecture and the particular strategy. We analyze a family of interacting issues that determine the performance trade-offs in each implementation, quantify the resulting latency, overhead, and bandwidth of the global access operations, and demonstrate the effects on application performance.