DAGON: technology binding and local optimization by DAG matching
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Code generation using tree matching and dynamic programming
ACM Transactions on Programming Languages and Systems (TOPLAS)
Bridging high-level synthesis to RTL technology libraries
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Partitioning by regularity extraction
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Instruction set mapping for performance optimization
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Tree-based mapping of algorithms to predefined structures
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
| Hi-index | 0.00 |
This paper presents a new method used in our RTL-synthesis tool to perform technology mapping with Sequential Functional Modules (SFMs) such as counters, accumulators, shift-registers, or rotators from any target or macro library. If the library contains SFMs, the method automatically recognizes them. If an RTL design contains patterns that can be implemented on SFMs, the method maps them to the SFMs found in the target library. This mapping reduces the design time by leveraging the library developer' s effort, leads to more regular and often smaller and faster designs, and helps to reduce timing and routing problems at later stages of the design process.