Fault location techniques for distributed control interconnection networks
IEEE Transactions on Computers
On the Constant Diagnosability of Baseline Interconnection Networks
IEEE Transactions on Computers
Computer Architecture and Parallel Processing
Computer Architecture and Parallel Processing
Fault Location in Multistage Interconnection Networks with Global and Distributed Control
Proceedings of the 8th International Symposium on Parallel Processing
Study of multistage SIMD interconnection networks
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
Built-in self test architectures for multistage interconnection networks
EDTC '96 Proceedings of the 1996 European conference on Design and Test
| Hi-index | 14.98 |
Procedures for fault location in globally controlled and comparison-based multistage interconnection networks (MINs) are presented. The number of tests is constant or depends logarithmically on the network size. The tests are independent of the actual fault location and type which yields reduced time consumption and simple implementation. Furthermore, these procedures are well suited to be implemented for a built-in self test.