A literature survey on distributed discrete event simulation
ACM SIGSIM Simulation Digest
A Hierarchical Computer Architecture for Distributed Simulation
IEEE Transactions on Computers
SAM—a computer aided design tool for specifying and analyzing modular, heirarchical systems
WSC '86 Proceedings of the 18th conference on Winter simulation
The role of polymorphism in class evolution in the DEVS-scheme environment
WSC' 90 Proceedings of the 22nd conference on Winter simulation
DEVS Formalism: A Framework for Hierarchical Model Development
IEEE Transactions on Software Engineering
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A methodology is being developed to map the hierarchical abstract simulator onto distributed simulator architectures. The hierarchical abstract simulator is a multicomponent, multilevel discrete event models communicating via message passing. This paper reports on an alternative mapping realization of the hierarchical abstract simulator by using DENELCOR's FORTRAN 77, an extension of FORTRAN 77 for parallel programming, on the Heterogeneous Element Processor (HEP) computer. Several runs were made on the implementation and it was found out that there are three constraints that affect the performance (execution time) of the HEP implementation: number of processors available, degree of synchronization and intercommunication, and workload.