A Hierarchical Computer Architecture for Distributed Simulation

  • Authors:
  • A. I. Concepcion

  • Affiliations:
  • De La Salle Univ., Manila, Philippines

  • Venue:
  • IEEE Transactions on Computers
  • Year:
  • 1989

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Abstract

A methodology is developed to map hierarchical, modular discrete-event models onto a distributed simulated architecture, the hierarchical multibus multiprocessor architecture (HM/sup 2/A). The proposed architecture contains features closely reflecting the structure, behaviour, and modular properties of the model being simulated. Hence, this approach improves on previous approaches, which impose the model on a predesigned architecture.