A microarchitectural performance evaluation of a 3.2 Gbyte/s microprocessor bus

  • Authors:
  • Tim Stanley;Michael Upton;Patrick Sherhart;Trevor Mudge;Richard Brown

  • Affiliations:
  • Advanced Computer Architecture Laboratory, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan;Advanced Computer Architecture Laboratory, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan;Advanced Computer Architecture Laboratory, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan;Advanced Computer Architecture Laboratory, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan;Advanced Computer Architecture Laboratory, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan

  • Venue:
  • MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
  • Year:
  • 1993

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Abstract