Resource allocation in a high clock rate microprocessor

Authors:
Michael Upton;Thomas Huff;Trevor Mudge;Richard Brown
Affiliations:
Department of Electrical Engineering and Computer Science, University of Michigan;Department of Electrical Engineering and Computer Science, University of Michigan;Department of Electrical Engineering and Computer Science, University of Michigan;Department of Electrical Engineering and Computer Science, University of Michigan
Venue:
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
Year:
1994

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Abstract

This paper discusses the design of a high clock rate (300MHz) processor. The architecture is described, and the goals for the design are explained. The performance of three processor models is evaluated using trace-driven simulation. A cost model is used to estimate the resources required to build processors with varying sizes of on-chip memories, in both single and dual issue models. Recommendations are then made to increase the effectiveness of each of the models.