Using ZPL to develop a parallel chaos router simulator

  • Authors:
  • Wilkey Richardson;Mary L. Bailey;William H. Sanders

  • Affiliations:
  • Department of Electrical and Computer Engineering, University of Arizona, Tucson, AZ;Computer Science Department, University of Arizona, Tucson, AZ;Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign, Urbana, IL

  • Venue:
  • WSC '96 Proceedings of the 28th conference on Winter simulation
  • Year:
  • 1996

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Abstract

This paper reports on our experience in writing a parallel version of a chaos router simulator using the new data driven parallel language ZPL. The simulator is a large program that tests the capabilities of ZPL. The (parallel) ZPL program is compared with the existing serial implementation on two very different architectures: a 16-processor Intel Paragon and a cluster of eight Alpha work stations. On the Paragon, the simulator performs best when simulating medium- to large-sized routers, and on the Alpha cluster, it performs best when simulating large routers. Thus a user can choose the parallel platform best suited to the router size.