Aggressive inlining

  • Authors:

  • Andrew Ayers;Richard Schooler;Robert Gottlieb

  • Affiliations:

  • Hewlett-Packard Massachusetts Language Laboratory, 300 Apollo Drive, Chelmsford, MA;Hewlett-Packard Massachusetts Language Laboratory, 300 Apollo Drive, Chelmsford, MA;Hewlett-Packard Massachusetts Language Laboratory, 300 Apollo Drive, Chelmsford, MA

  • Venue:
  • Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
  • Year:
  • 1997

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Abstract

Existing research understates the benefits that can be obtained from inlining and cloning, especially when guided by profile information. Our implementation of inlining and cloning yields excellent results on average and very rarely lowers performance. We believe our good results can be explained by a number of factors: inlining at the intermediate-code level removes most technical restrictions on what can be inlined; the ability to inline across files and incorporate profile information enables us to choose better inline candidates; a high-quality back end can exploit the scheduling and register allocation opportunities presented by larger subroutines; an aggressive processor architecture benefits from more predictable branch behavior; and a large instruction cache mitigates the impact of code expansion. We describe the often dramatic impact of our inlining and cloning on performance: for example, the implementations of our inlining and cloning algorithms in the HP-UX 10.20 compilers boost SPECint95 performance on a PA8000-based workstation by a factor of 1.32.