Reduced-order modeling of large linear subcircuits via a block Lanczos algorithm
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
A Test Matrix Collection for Non-Hermitian Eigenvalue Problems
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Efficient linear circuit analysis by Pade approximation via the Lanczos process
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Error bounded Padé approximation via bilinear conformal transformation
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
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Proceedings of the 2001 Asia and South Pacific Design Automation Conference
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This paper presents a general rational block Lanczos algorithm for computing multipoint matrix Pade approximation of linear multiport networks, which model many important circuits in digital, analog, or mixed signal designs. This algorithm generalizes a novel block Lanczos algorithm with a reliable adaptive scheme for breakdown treatment to address two drawbacks of the single frequency Pade approximation: poor approximation of the transfer function in the frequency domain far away from the expansion point and the instability of the reduced model when the original system is stable. In addition, due to smaller Krylov subspace corresponding to each frequency point, the rational algorithm also alleviates the possible breakdowns when completing high order approximations. The cost of full backward orthogonalization with respect to all previous Lanczos vectors in a rational Lanczos algorithm, as compared to a partial backward orthogonalization in a single point Lanczos algorithm, is offset by more accurate and smaller order approximations.