STAMPS: a state-machine based processor simulator

  • Authors:
  • Mike Livesey

  • Affiliations:
  • Division of Computer Science, University of St Andrews, North Haugh, St Andrews, Scotland KY16 9SS

  • Venue:
  • SIGCSE '97 Proceedings of the twenty-eighth SIGCSE technical symposium on Computer science education
  • Year:
  • 1997

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Abstract

This paper describes the STAMPS software workbench that supports Honours level computer architecture teaching. STAMPS was developed in response to a need perceived from experience of such teaching. It is a hierarchically structured CPU simulator that can be customised to any architecture and implementation of that architecture.STAMPS is written as a Tcl/wish application. Tcl facilitates interaction with the file system, simple naming conventions and highly flexible user interaction. STAMPS runs on any Unix platform.