A layout approach to monolithic microwave IC

Authors:
Akira Nagao;Takashi Kambe;Isao Shirakawa
Affiliations:
Systems Development Center, SHARP Corporation, Tenri, 632 Japan;Precision Technology Department Center, SHARP Corporation, Tenri, 632 Japan;Department of Information Systems Engineering, Osaka University, Suita, 565 Japan
Venue:
ISPD '98 Proceedings of the 1998 international symposium on Physical design
Year:
1998

Citing 3
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A layout approach to Monolithic Microwave IC

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Journal of the ACM (JACM)

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Abstract

A layout approach is described dedicatedly for MMICs, in which layout elements are transistors, inductors, capacitors, resistors, coplanar-waveguides, etc., implemented by GaAs fabrication process. The layout issue typical of such MMICs consists essentially in how to realize a single-layered placement of different shapes of layout elements under a variety of spacing and orientating constraints as well as shaping variations. In this paper, the interconnection requirements among the elements are represented by a graph, to which a planarization algorithm is effectively applied. On the basis of the planarization result, the physical placement is first constructed with the use of a merging scheme and then refined iteratively by means of a new rectangle-packing algorithm. Experimental results are also shown to demonstrate the practicability of the described layout approach.