Parallel program design: a foundation
Parallel program design: a foundation
Predicate calculus and program semantics
Predicate calculus and program semantics
Mechanically Verifying Concurrent Programs with the Boyer-Moore Prove
IEEE Transactions on Software Engineering
The temporal logic of reactive and concurrent systems
The temporal logic of reactive and concurrent systems
Larch: languages and tools for formal specification
Larch: languages and tools for formal specification
Introduction to HOL: a theorem proving environment for higher order logic
Introduction to HOL: a theorem proving environment for higher order logic
Portable, unobtrusive garbage collection for multiprocessor systems
POPL '94 Proceedings of the 21st ACM SIGPLAN-SIGACT symposium on Principles of programming languages
ACM Transactions on Programming Languages and Systems (TOPLAS)
Formal Verification for Fault-Tolerant Architectures: Prolegomena to the Design of PVS
IEEE Transactions on Software Engineering
Proving Liveness Properties of Concurrent Programs
ACM Transactions on Programming Languages and Systems (TOPLAS)
A Discipline of Programming
Verifying timing properties of concurrent algorithms
Proceedings of the 7th IFIP WG6.1 International Conference on Formal Description Techniques VII
Formal Verfication of a Protocol for Communications over Faulty Channels
Proceedings of the IFIP TC6 Eighth International Conference on Formal Description Techniques VIII
Generality in design and compositional verification using TAV
FORTE '92 Proceedings of the IFIP TC6/WG6.1 Fifth International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols: Formal Description Techniques, V
Using LP to Study the Language PL+0
Proceedings of the first First International Workshop on Larch
Formal Verification of Ada Programs
Proceedings of the first First International Workshop on Larch
Generating Proof Obligations for Circuits
Proceedings of the first First International Workshop on Larch
An Exercise in LP: The Proof of a Non Restoring Division Circuit
Proceedings of the first First International Workshop on Larch
Formal Verification of Concurrent Programs in LP and in COQ: A Comparative Analysis
TPHOLs '97 Proceedings of the 10th International Conference on Theorem Proving in Higher Order Logics
Localized Verification of Circuit Descriptions
Proceedings of the International Workshop on Automatic Verification Methods for Finite State Systems
Using Transformations and Verification in Ciruit Design
Proceedings of the Second IFIP WG10.2/WG10.5 Workshop on Designing Correct Circuits
Computer-Assisted Simulation Proofs
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Fundamenta Informaticae - Behavior of Composed Concurrent Systems: Logic and Reasoning
Electronic Notes in Theoretical Computer Science (ENTCS)
A framework for verifying data-centric protocols
FMOODS'11/FORTE'11 Proceedings of the joint 13th IFIP WG 6.1 and 30th IFIP WG 6.1 international conference on Formal techniques for distributed systems
Fundamenta Informaticae - Behavior of Composed Concurrent Systems: Logic and Reasoning
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This paper describes the use of the Larch prover to verify concurrent programs. The chosen specification environment is UNITY, whose proposed model can be fruitfully applied to a wide variety of problems and modified or extended for special purposes. Moreover, UNITY provides a high level of abstraction to express solutions to parallel programming problems. We investigate how the UNITY methodology can be mechanized within a general-purpose first-order logic theorem prover like LP, and how we can use the theorem proving methodology to prove safety and liveness properties. Then we describe the formalization and the verification of a communication protocol over faulty channels, using the Larch prover LP. We present the full computer-checked proof, and we show that a theorem prover can be used to detect flaws in a system specification.