Proceedings of the 1994 ACM/IEEE conference on Supercomputing
Simulated Annealing Based Parallel State Assignment of Finite State Machines
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Simulated Annealing Based Parallel State Assignment of Finite State Machines
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Fine-Grained Parallel VLSI Synthesis for Commercial CAD on a Network of Workstations
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
A parallel state assignment algorithm for finite state machines
HiPC'04 Proceedings of the 11th international conference on High Performance Computing
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Optimization of large sequential circuits has become unmanageable in CAD of VLSI due to time and memory requirements. We report a parallel algorithm for the state assignment problem for finite state machines. Our algorithm has three significant contributions: It is an asynchronous parallel algorithm portable across different MIMD machines. Time and memory requirements reduce linearly with the number of processors, enabling the parallel implementation to handle large problem sizes. The quality of the results for multiprocessor runs remains comparable to the serial algorithm on which it is based due to an implicit backtrack correction mechanism built into the parallel implementation.