A parallel PLA minimization program
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
ProperSYN: a portable parallel algorithm for logic synthesis
ICCAD '92 1992 IEEE/ACM international conference proceedings on Computer-aided design
Parallel algorithms for VLSI computer-aided design
Parallel algorithms for VLSI computer-aided design
Using MPI: portable parallel programming with the message-passing interface
Using MPI: portable parallel programming with the message-passing interface
Simulated annealing based parallel state assignment of finite state machines
Journal of Parallel and Distributed Computing
A Parallel Algorithm for State Assignment of Finite State Machines
IEEE Transactions on Computers
A Comparison of Parallel Approaches for Algebraic Factorization in Logic Synthesis
IPPS '97 Proceedings of the 11th International Symposium on Parallel Processing
Parallel algorithms for logic synthesis using the MIS approach
IPPS '95 Proceedings of the 9th International Symposium on Parallel Processing
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We present a fine-grained parallel processing scheme for speeding up an industrial VLSI synthesis tool on a network of workstations without sacrificing the quality of results. The synthesis tool is Ambit BuildGates, high-capacity ASIC logic synthesis software from Cadence Design Systems. We examine some necessary operating conditions for a practical parallel implementation of such software, and propose a parallel approach, which accommodates for the highly irregular computation requirements in synthesis and the high-latency, low-bandwidth conditions of the target environment. For pragmatic as well as performance concerns, we designed a parallel algorithm, which produces results (synthesized logic) that are identical to those of the original uniprocessor algorithm. We employ heuristic load assessment and adaptive cyclic distribution in order to actively balance the unpredictable load throughout execution, which enables a considerable reduction in runtime (i.e. 51.3 hours down to 23.4 hours) on actual customer design benchmarks.