Multiple-Way Network Partitioning with Different Cost Functions
IEEE Transactions on Computers
Parallel algorithms for logic synthesis using the MIS approach
IPPS '95 Proceedings of the 9th International Symposium on Parallel Processing
Logic optimization on a concurrent processing computer
EURO-DAC '90 Proceedings of the conference on European design automation
Parallel Logic Synthesis Using Partitioning
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 03
Fine-Grained Parallel VLSI Synthesis for Commercial CAD on a Network of Workstations
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
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Algebraic factorization is an extremely important part of any logic synthesis system, but it is computationally expensive. Hence, it is important to look at parallel processing to speed up the procedure. This paper presents three different parallel algorithms for algebraic factorization. The first algorithm uses circuit replication and uses a divide-and-conquer strategy. A second algorithm uses totally independent factorization on different circuit partitions with no interactions among the partitions. A third algorithm represents a compromise between the two approaches. It uses a novel L-shaped partitioning strategy which provides some interaction among the rectangles obtained in various partitions. For a large circuit like ex1010, the last algorithm runs 11.5 times faster over the sequential kernel extraction algorithms of the SIS sequential circuit synthesis system on six processors with less than 0.2% degradation in quality of the results.