A Learning Multiple-Valued Logic Network: Algebra, Algorithm, and Applications

  • Authors:
  • Zheng Tang;Okihiko Ishizuka;Qi-ping Cao

  • Affiliations:
  • Miyazaki Univ., Miyazaki-shi, Japan;Miyazaki Univ., Miyazaki-shi, Japan;Sanwa Newtech Corp., Miyazaki, Japan

  • Venue:
  • IEEE Transactions on Computers
  • Year:
  • 1998

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Abstract

We propose a multiple-valued logic (MVL) network with functional completeness and develop its learning capability. The MVL network consists of layered arithmetic piecewise linear processors. Since the arithmetic operations of the network are basically a wired-sum and a piecewise linear operation, their implementations should be rather simple and straightforward. Furthermore, the MVL network can be trained by the traditional backpropagation algorithm directly. The algorithm trains the networks using examples and appears to be available for most MVL problems of interest.