Transistor sizing issues and tool for multi-threshold CMOS technology
DAC '97 Proceedings of the 34th annual Design Automation Conference
Circuit-level techniques to control gate leakage for sub-100nm CMOS
Proceedings of the 2002 international symposium on Low power electronics and design
Design methodology for fine-grained leakage control in MTCMOS
Proceedings of the 2003 international symposium on Low power electronics and design
Elements of low power design for integrated systems
Proceedings of the 2003 international symposium on Low power electronics and design
Standby leakage reduction in nanoscale CMOS VLSI circuits
Proceedings of the International Conference and Workshop on Emerging Trends in Technology
An ARM perspective on addressing low-power energy-efficient SoC designs
Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design
Power gating applied to MP-SoCs for standby-mode power management
Proceedings of the 50th Annual Design Automation Conference
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Multi-Voltage CMOS (MVCMOS) is a design methodology for very low power supply voltages that uses low-threshold transistors in series with the supply rails. The control voltages on the gating transistors need to be outside of the Vdd - Vss range (hence the name MVCMOS) in order to reduce the standby current, but the resulting circuits operate at lower supply voltages and have a lower area overhead than the previously proposed Multi-Threshold CMOS (MTCMOS).