Power calculation and modeling in deep submicron

• Authors: Jay Abraham
• Venue: ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
• Year: 1998

Over the past few years it has become increasingly apparent that modern IC design is no longer bounded by timing and area constraints. Power has become significantly more important. In an era of hand held devices ranging from mobile computing to wireless communication systems, managing and controlling power takes on an important role. Several benefits are realized with low power designs in addition to extended battery life. Low power devices often run at lower junction temperatures and this leads to high reliability and low cost cooling systems [1,2,3,6]. Calculation and modeling of power (and delay) in deep-submicron (less then 0.25 microns) designs poses several challenges. This paper discusses the use of the Delay and Power Calculation System (DPCS) as a means by which EDA (Electronic Design Automation) tools can accurately calculate and model power.