Model development and verification for high level analog blocks

  • Authors:
  • Chandramouli Visweswariah;Rakesh Chadha;Chin-Fu Chen

  • Affiliations:
  • Carnegie-Mellon University, Pittsburgh, PA;AT&T Bell Laboratories, Murray Hill, NJ;AT&T Bell Laboratories, Murray Hill, NJ

  • Venue:
  • DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
  • Year:
  • 1988

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Abstract

Behavioral modeling of analog circuitry is an important step in making the design of large, mixed analog-digital chips manageable. Towards that end, this paper proposes a methodology for describing arbitrary analog blocks at the behavioral level. In order to verify the functionality of such behavioral models before incorporation into a simulation environment, a verification tool, ACME, has been developed. The designer's knowledge of the subcircuit is relied upon to generate good models. However, in some special cases, such as analog filters described as Laplace transforms or in the z-domain, the generation of time-domain models conforming to the above methodology has been automated. The tools modgens and modgenz convert transfer functions H (s) and H (z), respectively, into state-space representations in the time-domain. The behavioral models for the analog blocks are suitable for simulation along with digital subcircuits to accomplish mixed analog-digital simulation.