A dynamically-directed switch model for MOS logic simulation

Authors:
Dan Adler
Affiliations:
Silicon Compiler Systems, Martinsville Rd, P.O. Box 16, Liberty Corner, New Jersey
Venue:
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Year:
1988

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Abstract

A new model for MOS transistors suitable for logic simulation of VLSI circuits is presented based on the concept of a Dynamically Directed Switch (DDS). In this model, transistors are represented by directed edges in a graph, capable of changing their direction dynamically. A new distributed algorithm for switch-level simulation is presented based on an incremental graph algorithm where edge and vertex labels are updated as a consequence of circuit events. The result is a switch-level algorithm that runs at speeds approaching gate-level logic simulators, while dealing with all the features associated with switch-level simulation : bidirectional signal flow, ratioed logic, RC-tree timing, and correct handling of transistor signal propagation in the presence of unknown signals. The implementation of this algorithm in the Lsim Mixed-Mode Analog and Digital Simulator is described, and some results and examples are presented.