Dynamic power management for multidomain system-on-chip platforms: An optimal control approach
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special Section on Networks on Chip: Architecture, Tools, and Methodologies
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Most implementations of interior-point methods for linear programming rely on some form of elimination to solve the key equation system or systems at each iteration. Although these systems are typically very sparse, a substantial dense block often arises as the elimination proceeds. We describe a strategy that uses a serial "front-end" computer to carry out the sparse part of the elimination and a massively parallel processor to complete the elimination on the dense block. Through computational tests, we show that two such computers working together can solve hard linear programs much faster than either could alone. We conclude that our strategy is technically feasible now but that its components will have to be closer to the state of the art---in both serial and parallel processing---for it to be feasible in an economic sense.