Performance counters and state sharing annotations: a unified approach to thread locality

  • Authors:
  • Boris Weissman

  • Affiliations:
  • University of California at Berkeley and International Computer Science Institute, 1947 Center St, Suite 600, Berkeley, CA

  • Venue:
  • Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
  • Year:
  • 1998

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Abstract

This paper describes a combined approach for improving thread locality that uses the bardware performance monitors of modem processors and program-centric code annotations to guide thread scheduling on SMPs. The approach relies on a shared state cache model to compute expected thread footprints in the cache on-line. The accuracy of the model has been analyzed by simmations involving a set of parallel applications. We demonstrate how the cache model can be used to implement several practical locality-based thread scheduling policies with little overhead. Active Threads, a portable, high-performance thread system, has been built and used to investigate the performance impact of locality scheduling for several applications.