The Conservativeness of Reliability Estimates Based on Instantaneous Coverage
IEEE Transactions on Computers
Provably Conservative Approximations to Complex Reliability Models
IEEE Transactions on Computers - The MIT Press scientific computation series
Measurement and Application of Fault Latency
IEEE Transactions on Computers - The MIT Press scientific computation series
On-Line Diagnosis of Unrestricted Faults
IEEE Transactions on Computers
The Architectural Elements of a Symmetric Fault-Tolerant Multiprocessor
IEEE Transactions on Computers
Performability Evaluation of the SIFT Computer
IEEE Transactions on Computers
Reliability Analysis of Systems with Concurrent Error Detection
IEEE Transactions on Computers
Ultrahigh Reliability Prediction for Fault-Tolerant Computer Systems
IEEE Transactions on Computers
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Latent faults represent a potential obstacle in the synthesis of highly reliable digital computer systems. A simulation of an NMR redundant processor system was constructed using a gate level simulation package. The ability of each digital processor to react to randomly induced stuck-at faults is measured, and the amount of time it took the processor's control program to propagate faults to an output was recorded. These propagation times represent the latency times of the faults. The effect of fault latency in degrading system reliability is explored.