Reliability modeling techniques for self-repairing computer systems
ACM '69 Proceedings of the 1969 24th national conference
Design of a Self-Checking Microprogram Control
IEEE Transactions on Computers
An Iterative Cell Switch Design for Hybrid Redundancy
IEEE Transactions on Computers
The Design of a Microprogrammed Self-Checking Processor of an Electronic Switching System
IEEE Transactions on Computers
Arithmetic Error Codes: Cost and Effectiveness Studies for Application in Digital System Design
IEEE Transactions on Computers
Design of fault-tolerant computers
AFIPS '67 (Fall) Proceedings of the November 14-16, 1967, fall joint computer conference
AFIPS '70 (Spring) Proceedings of the May 5-7, 1970, spring joint computer conference
Design principles for processor maintainability in real-time systems
AFIPS '69 (Fall) Proceedings of the November 18-20, 1969, fall joint computer conference
A framework for hardware-software tradeoffs in the design of fault-tolerant computers
AFIPS '72 (Fall, part I) Proceedings of the December 5-7, 1972, fall joint computer conference, part I
An adaptive error correction scheme for computer memory system
AFIPS '72 (Fall, part I) Proceedings of the December 5-7, 1972, fall joint computer conference, part I
The effects of latent faults on highly reliable computer systems
IEEE Transactions on Computers - Special Issue on Real-Time Systems
Totally Self Checking reconfigurable duplication system with separate internal fault indication
ATS '95 Proceedings of the 4th Asian Test Symposium
An overview of fault-tolerant digital system architecture
AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
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There is an increasing use of error detectors and correctors in computer subsystems, such as parity detectors in memory modules and residue checkers in arithmetic units. Their fault tolerant characteristics are studied through the model of detector redundant systems. Their reliabilities and availabilities are analyzed and compared with those which do not have any such error detectors. The design of fault isolating and reconfiguring networks used in the implementation of such systems are developed.