On the power of neural networks for solving hard problems
Journal of Complexity
Training a limited-interconnect, synthetic neural IC
Advances in neural information processing systems 1
&egr;-Entropy and the complexity of feedforward neural networks
NIPS-3 Proceedings of the 1990 conference on Advances in neural information processing systems 3
Depth-Size Tradeoffs for Neural Computation
IEEE Transactions on Computers - Special issue on artificial neural networks
On the node complexity of neural networks
Neural Networks
2-1 Addition and Related Arithmetic Operations with Threshold Logic
IEEE Transactions on Computers
On the circuit complexity of sigmoid feedforward neural networks
Neural Networks
Constant fan-in digital neural networks are VLSI-optimal
MANNA '95 Proceedings of the first international conference on Mathematics of neural networks : models, algorithms and applications: models, algorithms and applications
UV-programmable Floating-Gate CMOS Linear Threshold Element "P1N3"
IWANN '03 Proceedings of the 7th International Work-Conference on Artificial and Natural Neural Networks: Part II: Artificial Neural Nets Problem Solving Methods
Using kolmogorov inspired gates for low power nanoelectronics
IWANN'05 Proceedings of the 8th international conference on Artificial Neural Networks: computational Intelligence and Bioinspired Systems
An efficient heuristic to identify threshold logic functions
ACM Journal on Emerging Technologies in Computing Systems (JETC)
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The starting points of thispaper are two size-optimal solutions: (i) one forimplementing arbitraryBoolean functions [1]; and (ii) another one forimplementing certainsub-classes of Boolean functions [2]. Because VLSIimplementationsdo not cope well with highly interconnectednets – the area of achip grows with the cube of the fan-in[3] – this paper will analysethe influence of limited fan-in on the size optimalityfor the twosolutions mentioned. First, we will extend a resultfrom Horne & Hush[1] valid for fan-ins &Dgr; = 2 toarbitrary fan-in. Second,we will prove that size-optimal solutions are obtainedfor small constantfan-in for both constructions, while relative minimumsize solutionscan be obtained for fan-ins strictly lower thanlinear. These resultsare in agreement with similar ones proving that forsmall constantfan-ins (&Dgr; = 6 ... 9), thereexist VLSI-optimal (i.e.,minimising AT2) solutions[4], while there aresimilar small constants relating to our capacity ofprocessing information [5].