Performance re-engineering of embedded real-time systems

Authors:
Minsoo Ryu;Jungkeun Park;Kimoon Kim;Yangmin Seo;Seongsoo Hong
Affiliations:
School of Electrical Engineering and ERC-ACI, Seoul National University, Seoul 151-742, Korea;School of Electrical Engineering and ERC-ACI, Seoul National University, Seoul 151-742, Korea;School of Electrical Engineering and ERC-ACI, Seoul National University, Seoul 151-742, Korea;School of Electrical Engineering and ERC-ACI, Seoul National University, Seoul 151-742, Korea;School of Electrical Engineering and ERC-ACI, Seoul National University, Seoul 151-742, Korea
Venue:
Proceedings of the ACM SIGPLAN 1999 workshop on Languages, compilers, and tools for embedded systems
Year:
1999

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Abstract

This paper formulates a problem of embedded real-time system re-engineering, and presents its solution approach. The re-engineering of an embedded system is defined as a development task of meeting newly imposed performance requirements after its hardware and software have been fully implemented. The performance requirements may include a real-time throughput and an input-to-output latency. The proposed solution approach is based on a bottleneck analysis and nonlinear optimization. Inputs to the approach include a system design specified with a process network and a set of task graphs, task allocation and scheduling, and a new real-time throughput requirement specified as a system's period constraint.The solution approach works in two steps. In the first step, it determines bottleneck processes in the process network via estimation of process latencies. In the second step, it derives a system of constraints with performance scaling factors of processing elements being variables. It then solves the constraints for the performance scaling factors with an objective of minimizing the total hardware cost of the resultant system. These scaling factors suggest the minimal cost hardware upgrade to meet the new performance requirements. Since this approach does not modify carefully designed software structures, it helps reduce the reengineering cycle.