ACM Computing Surveys (CSUR)
Computer Architecture and Parallel Processing
Computer Architecture and Parallel Processing
ACM Transactions on Computer Systems (TOCS)
ACM Transactions on Computer Systems (TOCS)
The Stack Growth Function: Cache Line Reference Models
IEEE Transactions on Computers
ICS '96 Proceedings of the 10th international conference on Supercomputing
Parametric Analysis of Polyhedral Iteration Spaces
Journal of VLSI Signal Processing Systems - Special issue on application specific systems, architectures and processors
Optimal tiling for minimizing communication in distributed shared-memory multiprocessors
Compiler optimizations for scalable parallel systems
IEEE Transactions on Parallel and Distributed Systems
Modelling contention sensing memory management systems: A VAX/VMS case study
Mathematical and Computer Modelling: An International Journal
Reuse-based online models for caches
Proceedings of the ACM SIGMETRICS/international conference on Measurement and modeling of computer systems
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This paper develops an analytical model for a cache-reload transient. When an interrupt program or system program runs periodically in a cache-based computer, a short cache-reload transient occurs each time the interrupt program is invoked. That transient depends on the size of the cache, the fraction of the cache used by the interrupt program, and the fraction of the cache used by background programs that run between interrupts. We call the portion of a cache used by a program its footprint in the cache, and we show that the reload transient is related to the area in the tail of a normal distribution whose mean is a function of the footprints of the programs that compete for the cache. We believe that the model may be useful as well for predicting paging behavior in virtual-memory systems with round-robin scheduling.