VAX architecture reference manual (2nd ed.)
VAX architecture reference manual (2nd ed.)
Communications of the ACM - Special issue on computer architecture
SPIRE: streaming processing with instructions release element
ACM SIGARCH Computer Architecture News
Introducing a New Cache Design into Vector Computers
IEEE Transactions on Computers
A Comparative Analysis of Cache Designs for Vector Processing
IEEE Transactions on Computers
Cache Refill/Access Decoupling for Vector Machines
Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
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The VAX Architecture has been extended to include an integrated, register-based vector processor. This extension allows both high-end and low-end implementations and can be supported with only small changes by VAX/VMS and VAX/ULTRIX operating systems. The extension is effectively exploited by the new vectorizing capabilities of VAX FORTRAN. Features of the VAX Vector Architecture and the design decisions which make it a consistent extension of the VAX Architecture are discussed.