Automatic compiler techniques for thread coarsening for multithreaded architectures
Proceedings of the 14th international conference on Supercomputing
A Compiler Directed Approach to Hiding Configuration Latency in Chameleon Processors
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
High-performance IPv6 forwarding algorithm for multi-core and multithreaded network processor
Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming
High-performance packet classification algorithm for many-core and multithreaded network processor
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
High-performance packet classification algorithm for multithreaded IXP network processor
ACM Transactions on Embedded Computing Systems (TECS)
Scalable packet classification using interpreting: a cross-platform multi-core solution
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming
Practice of parallelizing network applications on multi-core architectures
Proceedings of the 23rd international conference on Supercomputing
Optimal loop parallelization for maximizing iteration-level parallelism
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
Collaborative scheduling of DAG structured computations on multicore processors
Proceedings of the 7th ACM international conference on Computing frontiers
Energy-Aware Loop Parallelism Maximization for Multi-core DSP Architectures
GREENCOM-CPSCOM '10 Proceedings of the 2010 IEEE/ACM Int'l Conference on Green Computing and Communications & Int'l Conference on Cyber, Physical and Social Computing
| Hi-index | 0.00 |