A hardware switch level simulator for large MOS circuits

  • Authors:
  • M. T. Smith

  • Affiliations:
  • Hewlett Packard Laboratories, 3172 Porter Dr. Building 29U., Palo Alto, California

  • Venue:
  • DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
  • Year:
  • 1987

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Abstract

The HSS is a Hardware Switch level Simulator that has been designed and built to be a useful and cost effective addition to a MOS circuit designers tool set. The HSS is based on the MOSSIM software simulator, but has been further developed to include hardware for simulating pass transistor circuits and for doing timing simulation. By using dynamic RAM for internal list storage, a single HSS processor can accommodate a circuit of up to 262,144 MOS devices. The HSS can be interfaced to a variety of host computers via a general purpose parallel interface, and in its current form offers a 25 times speed improvement compared to MOSSIM II running on a VAX 11-780. Timing mode offers similar speed advantages, with delay calculations that are sufficiently accurate for many simulation tasks.