The ALGIC silicon compiler system: implementation, design experience and results

  • Authors:
  • J. Schuck;N. Wehn;M Glesner;G. Kamp

  • Affiliations:
  • Technical University of Darmstadt, Institut fuer Halbleitertechnik, Schlossgartenstr.8, D-6100 Darmstadt, FR Germany;Technical University of Darmstadt, Institut fuer Halbleitertechnik, Schlossgartenstr.8, D-6100 Darmstadt, FR Germany;Technical University of Darmstadt, Institut fuer Halbleitertechnik, Schlossgartenstr.8, D-6100 Darmstadt, FR Germany;Technical University of Darmstadt, Institut fuer Halbleitertechnik, Schlossgartenstr.8, D-6100 Darmstadt, FR Germany

  • Venue:
  • DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
  • Year:
  • 1987

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Abstract

In this paper we present the ALGIC silicon compiler system. Starting from a structural and functional description of digital VLSI circuits, the system generates automatically the corresponding layout in a full custom design style. Main components of the ALGIC system are a system monitor module, a parameterisable macrocell generator, an appropriate floorplanner with 100% routing solution including planar VDD/GND trees and a block-oriented timing verifier. One essential feature of the system is the high degree of integration between all program modules using the concept of abstract data types. The flexibility and performance of the whole system is demonstrated by real design examples in the field of DSP applications.